Keysight Technologies has made enhancements to its M8040A high performance bit error rate tester (BERT) solution for testing PAM-4 and NRZ devices that operate up to 64GBaud. Engineers in validation labs and R&D who characterise receivers on the physical layer for emerging 400G data centre interconnects will benefit from simplified test setups and repeatable and accurate results.
Today’s data centre infrastructure is continuously optimised to address bandwidth capacity growth, power, reach and service differentiation.
Higher transmission rates, more transmission lanes, and new multi-level data formats, such as PAM-4, address the increased transmission bandwidth demand for the next-generation data centre interconnects.
The latest revisions of IEEE 802.3bs and OIF CEI-56G implementation agreements define PAM-4 and NRZ interfaces for electrical chip-to-chip, chip-to-module, backplane connections and optical interfaces for up to 400 Gb/s bandwidth. R&D and validation labs that need to characterize receivers for data centre interconnects with PAM-4 or NRZ data rates up to 64GBaud are facing new test challenges, such as tighter timing margins, channel loss, non-linearity, level interference and crosstalk effects—making test efficiency and accuracy essential.
Overcoming channel loss in electrical interfaces, such as chip-to-chip, chip-to-module interfaces and backplanes, is a big challenge with higher symbol rates.
Pre-distortion techniques, such as de-emphasis, are used in the transmitter and equalisation in the receiver to help re-open closed eyes caused by inter-symbol interference.